Intelligent Defect Analysis, Framework for Integrated Data Management
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Intelligent Defect Analyzer
Advanced Signature Analyzer
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Semiconductor fabs currently use defect count or defect density as a triggering mechanism for their Statistical Process Control. However, in the early stages of a process excursion, a careful analysis of the wafer inspection data may exhibit a defect signature, but the defect count or defect density may be too low to trigger the SPC. In this case, the process excursion will go undetected until the subsequent inspection cycle. When the SPC threshold is finally triggered, analysis of the root cause can often take several additional hours. These delays in identifying the root cause put a considerable number of product wafers at risk.

Manual review of all inspection data could potentially identify these low defect count signatures, but in addition to being highly subjective, manual review is both expensive and time-consuming. Defect engineers and fab managers are seeking a way to automate the review process, thereby eliminating subjectivity and operator error from the review process, and accelerating the root cause analysis.

SiGlaz Intelligent Defect Analysis (IDATM) software provides fabs with an automatic excursion monitoring capability that integrates seamlessly into existing yield management architecture to provide immediate value-added functionality. Signature recognition and root cause analysis of a process excursion can now be accomplished in seconds.

Key Benefits of IDA:

Reduced WIP exposure — immediate feedback allows fab to limit loss from process excursions

Early warning — identifies problems that fall below SPC defect count limits

Standardization — provides consistent methodology for analyzing inspection results

Increased efficiency — frees up time for defect engineers to work on yield problems, instead of reviewing KLARF files

Reduced Equipment Downtime — notifies responsible engineer of root cause immediately upon signature recognition

IDA Product Overview

SiGlaz IDA software is comprised of two main components: Defect Signature Analyzer, which provides the yield engineer with a wide range of analysis and visualization tools with which to develop and optimize the defect signature analysis methodology and to train the defect signature library; and Automation Workbench, which allows the engineer to automate the signature analysis methodology to run in either batch mode or continuous monitor mode.

Figure 1 below shows how the main components of IDA software integrate into the fab defect analysis system.

Figure 1
IDA main components, Defect Signature Analyzer (yellow) and Automation Workbench (green), integrate easily into the fab defect analysis process (blue).

IDA contains a robust data mining engine that automatically compares the inspection data to a library of defect signatures. The Defect Signature Analyzer (shown in yellow in the figure above) allows the defect engineer to generate and manage the defect signature data base; each fabrication process step may contain its own signature library; an analysis recipe, generated by the Automation Workbench, automatically compares the inspection data to the specified signature library. When the correlation to a signature exceeds a user-defined threshold level, the analysis recipe may be programmed to notify fab personnel by email or page.

In order to increase the probability of recognizing a latent defect signature in the inspection data, IDA employs a wide range of spatial filtering and signature enhancement techniques. Defect Signature Analyzer allows the defect engineer to visualize the way that these functions, when used in combination, will respond to a range of inspection data. See Figure 2.

Figure 2

IDA Defect Signature Analyzer includes visualization tools that enable the user to optimize the defect analysis recipe. In the example above, CMP micro-scratches are displayed in a die stack window.

In this way the engineer can optimize the analysis sequence and parameters for a particular process step. The Automation Workbench software allows the user to replicate the sequence and parameters in an analysis recipe. The recipe can be then scheduled and run automatically either in batch mode or in continuous monitor mode.
IDA may be integrated into the fabrication process to identify concentrated defect signatures (e.g., scratches or micro-scratches) or to identify distributed defect signatures, such a those resulting from the failure of a process tool. Examples of scratch analysis and distributed signature analysis recipes are illustrated below.

Scratch Analysis

Scratches on the wafer surface may originate from a mechanical handling failure, from human error, or from a process effect, such as Chemical Mechanical Planarization. By using the IDA Scratch Analyzer, the scratches may be isolated and classified automatically and in real time. Each type of scratch may be handled differently. Figure 3 shows an example of a process recipe that may be used to analyze the scratches on CMP wafers. The recipe was generated using the IDA Automation Workbench graphical editor. IDA allows the user to generate multiple analysis recipes that can be run in parallel.

In the example recipe below, the defect engineer wants to isolate the CMP scratches in the KLARF file and send the results from every file to Statistical Process Control (SPC). He then controls the CMP process step by measuring the number of dies that are affected by CMP scratches. When the number of dies affected exceeds the upper control limit, the SPC system will initiate equipment maintenance (e.g., change the pad or slurry).

Figure 3
IDA Automation Workbench allows the user to create analysis recipes using a graphical editor. Recipes may be scheduled to run in batch mode or continuous monitor mode. The above recipe may be used to analyze CMP scratches.

When the data source for the inspection equipment results files is defined as a KLARF file path, as it is in the above recipe (step 2), the IDA Automation Workbench continuously monitors a specified folder for input files. As KLARF files are written to the folder, the IDA recipe opens the file and analyzes it according to the recipe. The next two functional blocks in the recipe (steps 3 and 3A) comprise a process step filter; step 3 checks the process step entry in the KLARF file header and passes it to the decision block (3A). If it matches the specified CMP Step ID, the analysis of the file proceeds; if it does not, the recipe does not analyze the file. The next block (4) analyzes the file for scratches and writes the results to an output KLARF file (5), which is then sent via email to SPC (6). Figure 4 shows a wafer map of an input file and an output file after scratch analysis.

Figure 4
IDA Scratch Analyzer allows the user to isolate CMP scratches from inspection equipment results file. Wafer map of input file is shown on left; output is shown on right.

Distributed Signature Analysis

Distributed defect signatures are caused by equipment failures or malfunctions that change process conditions at the wafer surface (for example, a chamber leak or a clogged nozzle). Since the spatial distribution of defects on the wafer map is correlated to the specific failure mechanism, fab engineers are often able to diagnose the root cause of the failure by recognizing the defect signatures that is apparent in the wafer map. Similarly, IDA software correlates the spatial distribution of defects in a KLARF file to a defect signature library, often recognizing the signature in its early stages.

Figure 5
The above recipe may be used to recognize distributed defect signatures resulting from process tool failure.

Figure 5 shows an example of a process recipe that may be used to recognize distributed defects from a process tool, such as a Chemical Vapor Deposition (CVD) system. In this recipe, the data source (2) is specified as a KLARF file list, which is defined by the user. A process step filter (3, 3A) checks the KLARF file header for the correct Step ID. The next two steps in the recipe are spatial filters to enhance the defect signature. The annular filter (4) removes the defects from the outermost 10mm of the wafer; the k-NN filter (5) removes background noise and concentrated defect clusters, for example, scratches, that are not part of the signature. The signature recognition step (6, 6A) compares the filtered data to the specified signature library. If the correlation to a signature in the library exceeds a specified threshold, the recipe will create a KLARF (7) and a text file (8), and send an email (9) to the fab engineer with the signature report (text file) and filtered KLARF attached. Figure 6 shows an example of the results of above recipe.

Figure 6
The wafer map on the left shows the wafer map of a latent distributed defect signature and a scratch. The wafer map in the center shows the same file after filtering. The image on the right shows the result of the IDA signature function. Note the removal of the scratch and background noise, and relatively high correlation to the starfish defect signature (84%).

IDA Benefits

IDA provides the fab with a new tool for analyzing wafer inspection data. It can monitor all of the inspection results files from a process step and provide immediate notification when it recognizes a defect signature.


Reduced WIP Exposure – When a process excursion occurs, IDA will recognize the defect signature immediately. The time required to review, classify and analyze defect data is reduced from hours to minutes, thereby limiting yield loss.

Standardization - IDA provides a consistent methodology for analyzing inspection data, eliminating subjectivity and human error. It also provides a central repository for defect signature information, which may be shared between fabs to facilitate technology transfer.

Early warning — At the early stages of a process excursion, the defect count may fall within the SPC control limits. IDA identifies defect signatures based on spatial signatures, not defect count, thereby flagging the problem at an early stage.

Increased efficiency — IDA can effectively screen every KLARF generated by a process, freeing the defect engineers to work on yield problems.
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Reduced Equipment Downtime — When a defect signature is recognized, IDA can immediately notify the responsible engineer of probable root cause, thereby saving time diagnosing the problem.

Self learning Library — IDA can identify non-random spatial signatures that have not yet been trained into the defect signature library and flag them for further investigation by defect engineers.

Software Integration

SiGlaz’ Intelligent Defect Analysis software is a PC-based application that integrates easily into the existing fab Yield Management System. The installation is non-intrusive. IDA operates on WindowsTM XP with Microsoft Office XP or 2003.

Please refer to white-paper for Pdf file of this page.
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